"An efficient in-memory carry select adder realization using resistive " by U. Dilna and S. N. Prasad
 

An efficient in-memory carry select adder realization using resistive switching crossbar array with Ti-doped VO2 -based selector device

Document Type

Article

Publication Title

Materials Science in Semiconductor Processing

Abstract

In-memory computing (IMC) can significantly increase speed efficiency by significantly reducing the time and energy consumption of memory access. Therefore, efficient storage actions are essential for applications that require a lot of data. This article presents a simple Carry Generation and Selection (CGS) scheme-based Carry SeLect Adder (CGS-CSLA) using the realization of the Boolean majority three operation with an overturned input in crossbar Resistive memory. However, the usage of crossbar array structure is constrained by the sneak current path issue in real applications. The proposed 1S1R crossbar array uses a Ti-doped VO2 selector device to address this problem. Also, the proposed CSLA comprises a multiple-step architecture that comprises numerous single-step elements to improve the speed of operation using parallel operations. The proposed CGS-CSLA removes the superfluous operations of the traditional CSLA by simplifying the logic. The suggested adder lowered the delay to 8+3log2(n) and used less energy by minimizing sneak currents.

DOI

10.1016/j.mssp.2023.108008

Publication Date

3-1-2024

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